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gdb halt command was not being sent to CPU interpreter

This commit is contained in:
Xavier Del Campo Romero 2020-06-08 00:20:26 +02:00
parent 4458c537ac
commit aa89de282b
3 changed files with 33 additions and 11 deletions
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21
gdbstub/gdbstub_sys.c
View File

@ -72,6 +72,8 @@ static void update_regs(struct dbg_state *const dbg_state)
dbg_state->registers[DBG_CPU_MIPS_I_REG_PC] = psxRegs.pc;
}
static int exit_loop;
int dbg_sys_getc(void)
{
while (1) {
@ -136,8 +138,11 @@ static int wait_hit_or_break(struct msg *msg)
switch (err) {
case READ_SOCKET_OK:
if (len && packet == 0x03)
return 0;
if (len && packet == 0x03) {
DEBUG_PRINT("received break\n");
psxCpu->Halt();
return wait_hit_or_break(msg);
}
break;
@ -275,8 +280,6 @@ static int queue_create(void)
}
#endif
static int exit_loop;
static void *loop(void *const args)
{
struct dbg_state dbg_state = {0};
@ -347,6 +350,16 @@ void dbg_stop(void)
{
exit_loop = 1;
stop_thread();
if (client_socket > 0) {
StopServer(client_socket);
printf("Terminated active gdb connection\n");
}
if (server_socket > 0) {
StopServer(server_socket);
printf("Closed gdb server\n");
}
}
void dbg_start(void)

12
libpcsxcore/psxinterpreter.c
View File

@ -1182,6 +1182,12 @@ static void intReset() {
psxRegs.ICache_valid = FALSE;
}
static int halt;
static void intHalt() {
halt = 1;
}
static void intExecute() {
for (;;)
execI();
@ -1207,7 +1213,7 @@ static void process_gdb(void) {
if (shutdown)
return;
if (step || (must_continue && tgt_addr && tgt_addr == psxRegs.pc)) {
if (halt || step || (must_continue && tgt_addr && tgt_addr == psxRegs.pc)) {
msg.type = MSG_TYPE_HIT;
#if DEBUG == 1
printf("hit address 0x%08X\n", psxRegs.pc);
@ -1215,6 +1221,7 @@ static void process_gdb(void) {
gdbstub_sys_send(&msg);
must_continue = 0;
step = 0;
halt = 0;
}
if (!must_continue) {
@ -1283,5 +1290,6 @@ R3000Acpu psxInt = {
intExecuteBlock,
intClear,
intShutdown,
intSetPGXPMode
intSetPGXPMode,
intHalt
};

11
libpcsxcore/r3000a.h
View File

@ -37,6 +37,7 @@ typedef struct {
void (*Clear)(u32 Addr, u32 Size);
void (*Shutdown)();
void (*SetPGXPMode)(u32 pgxpMode);
void (*Halt)(); /* stops CPU */
} R3000Acpu;
extern R3000Acpu *psxCpu;
@ -291,11 +292,11 @@ static inline u32 *Read_ICache(u32 pc, boolean isolate) {
/**** R3000A Instruction Macros ****/
#define _PC_ psxRegs.pc // The next PC to be executed
#define _fOp_(code) ((code >> 26) ) // The opcode part of the instruction register
#define _fFunct_(code) ((code ) & 0x3F) // The funct part of the instruction register
#define _fRd_(code) ((code >> 11) & 0x1F) // The rd part of the instruction register
#define _fRt_(code) ((code >> 16) & 0x1F) // The rt part of the instruction register
#define _fRs_(code) ((code >> 21) & 0x1F) // The rs part of the instruction register
#define _fOp_(code) ((code >> 26) ) // The opcode part of the instruction register
#define _fFunct_(code) ((code ) & 0x3F) // The funct part of the instruction register
#define _fRd_(code) ((code >> 11) & 0x1F) // The rd part of the instruction register
#define _fRt_(code) ((code >> 16) & 0x1F) // The rt part of the instruction register
#define _fRs_(code) ((code >> 21) & 0x1F) // The rs part of the instruction register
#define _fSa_(code) ((code >> 6) & 0x1F) // The sa part of the instruction register
#define _fIm_(code) ((u16)code) // The immediate part of the instruction register
#define _fTarget_(code) (code & 0x03ffffff) // The target part of the instruction register