Change "valid" flag to multiple bit flags
Validity of a pgxp value can now be set for any of four components using individual bit flags. This also allows the potential expansion of more flag data for each component.
This commit is contained in:
parent
03cfe9e6c2
commit
97105b26f2
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@ -49,7 +49,7 @@ void InvalidLoad(u32 addr, u32 code, u32 value)
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p.count = value;
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}
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p.valid = 0;
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p.flags = 0;
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// invalidate register
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CPU_reg[reg] = p;
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@ -69,7 +69,7 @@ void InvalidStore(u32 addr, u32 code, u32 value)
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if (pD)
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p = *pD;
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p.valid = 0;
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p.flags = 0;
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p.count = (reg * 1000) + value;
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// invalidate memory
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@ -128,7 +128,7 @@ void PGXP_CPU_ANDI(u32 instr, u32 rtVal, u32 rsVal)
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break;
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default:
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// x is undefined, invalidate value
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CPU_reg[rt(instr)].valid = 0;
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CPU_reg[rt(instr)].flags = 0;
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}
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CPU_reg[rt(instr)].value = rtVal;
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@ -142,7 +142,7 @@ void PGXP_CPU_ORI(u32 instr, u32 rtVal, u32 rsVal)
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// Invalidate on non-zero values for now
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if (imm(instr) != 0)
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CPU_reg[rt(instr)].valid = 0;
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CPU_reg[rt(instr)].flags = 0;
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CPU_reg[rt(instr)].value = rtVal;
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}
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@ -155,7 +155,7 @@ void PGXP_CPU_XORI(u32 instr, u32 rtVal, u32 rsVal)
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// Invalidate on non-zero values for now
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if (imm(instr) != 0)
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CPU_reg[rt(instr)].valid = 0;
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CPU_reg[rt(instr)].flags = 0;
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CPU_reg[rt(instr)].value = rtVal;
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}
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@ -210,7 +210,7 @@ void PGXP_CPU_ADD(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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Validate(&CPU_reg[rt(instr)], rtVal);
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// iCB: Only require one valid input
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if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
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if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
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{
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MakeValid(&CPU_reg[rs(instr)], rsVal);
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MakeValid(&CPU_reg[rt(instr)], rtVal);
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@ -221,7 +221,7 @@ void PGXP_CPU_ADD(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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ret.x += CPU_reg[rt(instr)].x;
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ret.y += CPU_reg[rt(instr)].y;
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ret.valid &= CPU_reg[rt(instr)].valid;
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ret.halfFlags[0] &= CPU_reg[rt(instr)].halfFlags[0];
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ret.gFlags |= CPU_reg[rt(instr)].gFlags;
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ret.lFlags |= CPU_reg[rt(instr)].lFlags;
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ret.hFlags |= CPU_reg[rt(instr)].hFlags;
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@ -245,7 +245,7 @@ void PGXP_CPU_SUB(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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Validate(&CPU_reg[rt(instr)], rtVal);
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// iCB: Only require one valid input
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if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
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if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
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{
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MakeValid(&CPU_reg[rs(instr)], rsVal);
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MakeValid(&CPU_reg[rt(instr)], rtVal);
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@ -256,7 +256,7 @@ void PGXP_CPU_SUB(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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ret.x -= CPU_reg[rt(instr)].x;
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ret.y -= CPU_reg[rt(instr)].y;
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ret.valid &= CPU_reg[rt(instr)].valid;
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ret.halfFlags[0] &= CPU_reg[rt(instr)].halfFlags[0];
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ret.gFlags |= CPU_reg[rt(instr)].gFlags;
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ret.lFlags |= CPU_reg[rt(instr)].lFlags;
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ret.hFlags |= CPU_reg[rt(instr)].hFlags;
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@ -282,7 +282,7 @@ void PGXP_CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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Validate(&CPU_reg[rt(instr)], rtVal);
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// iCB: Only require one valid input
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if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
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if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
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{
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MakeValid(&CPU_reg[rs(instr)], rsVal);
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MakeValid(&CPU_reg[rt(instr)], rtVal);
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@ -293,7 +293,7 @@ void PGXP_CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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valt.d = rtVal;
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// CPU_reg[rd(instr)].valid = CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid;
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ret.valid = 1;
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ret.flags = VALID_01;
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if (vald.w.l == 0)
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{
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@ -304,17 +304,18 @@ void PGXP_CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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{
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ret.x = CPU_reg[rs(instr)].x;
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ret.lFlags = CPU_reg[rs(instr)].lFlags;
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ret.valid &= CPU_reg[rs(instr)].valid;
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ret.compFlags[0] = CPU_reg[rs(instr)].compFlags[0];
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}
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else if (vald.w.l == valt.w.l)
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{
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ret.x = CPU_reg[rt(instr)].x;
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ret.lFlags = CPU_reg[rt(instr)].lFlags;
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ret.valid &= CPU_reg[rt(instr)].valid;
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ret.compFlags[0] = CPU_reg[rt(instr)].compFlags[0];
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}
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else
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{
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ret.valid = 0;
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ret.x = (float)vald.sw.l;
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ret.compFlags[0] = VALID;
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ret.lFlags = 0;
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}
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@ -327,23 +328,24 @@ void PGXP_CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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{
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ret.y = CPU_reg[rs(instr)].y;
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ret.hFlags = CPU_reg[rs(instr)].hFlags;
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ret.valid &= CPU_reg[rs(instr)].valid;
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ret.compFlags[1] &= CPU_reg[rs(instr)].compFlags[1];
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}
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else if (vald.w.h == valt.w.h)
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{
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ret.y = CPU_reg[rt(instr)].y;
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ret.hFlags = CPU_reg[rt(instr)].hFlags;
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ret.valid &= CPU_reg[rt(instr)].valid;
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ret.compFlags[1] &= CPU_reg[rt(instr)].compFlags[1];
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}
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else
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{
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ret.valid = 0;
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ret.y = (float)vald.sw.h;
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ret.compFlags[1] = VALID;
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ret.hFlags = 0;
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}
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// iCB Hack: Force validity if even one half is valid
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if ((ret.hFlags & VALID_HALF) || (ret.lFlags & VALID_HALF))
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ret.valid = 1;
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//if ((ret.hFlags & VALID_HALF) || (ret.lFlags & VALID_HALF))
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// ret.valid = 1;
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// /iCB Hack
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ret.value = rdVal;
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@ -376,7 +378,7 @@ void PGXP_CPU_SLT(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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Validate(&CPU_reg[rt(instr)], rtVal);
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// iCB: Only require one valid input
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if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
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if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
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{
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MakeValid(&CPU_reg[rs(instr)], rsVal);
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MakeValid(&CPU_reg[rt(instr)], rtVal);
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@ -400,7 +402,7 @@ void PGXP_CPU_SLTU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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Validate(&CPU_reg[rt(instr)], rtVal);
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// iCB: Only require one valid input
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if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
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if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
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{
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MakeValid(&CPU_reg[rs(instr)], rsVal);
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MakeValid(&CPU_reg[rt(instr)], rtVal);
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@ -425,7 +427,7 @@ void PGXP_CPU_MULT(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
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Validate(&CPU_reg[rt(instr)], rtVal);
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// iCB: Only require one valid input
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if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
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if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
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{
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MakeValid(&CPU_reg[rs(instr)], rsVal);
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MakeValid(&CPU_reg[rt(instr)], rtVal);
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@ -437,7 +439,7 @@ void PGXP_CPU_MULT(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
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CPU_Hi.x = vs * vt;// CPU_reg[rs(instr)].y * CPU_reg[rt(instr)].y;
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CPU_Lo.y = (CPU_Hi.x - ((s32)CPU_Hi.x)) * (float)(1 << 16);// CPU_reg[rs(instr)].x * CPU_reg[rt(instr)].x; // Get fractional part
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CPU_Lo.valid = CPU_Hi.valid = CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid;
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CPU_Lo.halfFlags[0] = CPU_Hi.halfFlags[0] = (CPU_reg[rs(instr)].halfFlags[0] & CPU_reg[rt(instr)].halfFlags[0]);
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CPU_Lo.value = loVal;
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CPU_Hi.value = hiVal;
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@ -450,7 +452,7 @@ void PGXP_CPU_MULTU(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
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Validate(&CPU_reg[rt(instr)], rtVal);
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// iCB: Only require one valid input
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if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
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if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
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{
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MakeValid(&CPU_reg[rs(instr)], rsVal);
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MakeValid(&CPU_reg[rt(instr)], rtVal);
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@ -462,7 +464,7 @@ void PGXP_CPU_MULTU(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
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CPU_Hi.x = vs * vt;// fabs(CPU_reg[rs(instr)].y) * fabs(CPU_reg[rt(instr)].y);
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CPU_Lo.y = (CPU_Hi.x - ((s32)CPU_Hi.x)) * (float)(1 << 16);// fabs(CPU_reg[rs(instr)].x) * fabs(CPU_reg[rt(instr)].x); // Get fractional part
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CPU_Lo.valid = CPU_Hi.valid = CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid;
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CPU_Lo.halfFlags[0] = CPU_Hi.halfFlags[0] = (CPU_reg[rs(instr)].halfFlags[0] & CPU_reg[rt(instr)].halfFlags[0]);
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CPU_Lo.value = loVal;
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CPU_Hi.value = hiVal;
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@ -476,7 +478,7 @@ void PGXP_CPU_DIV(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
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Validate(&CPU_reg[rt(instr)], rtVal);
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//// iCB: Only require one valid input
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if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
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if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
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{
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MakeValid(&CPU_reg[rs(instr)], rsVal);
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MakeValid(&CPU_reg[rt(instr)], rtVal);
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@ -489,7 +491,7 @@ void PGXP_CPU_DIV(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
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CPU_Hi.x = fmod(vs, vt);
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CPU_Lo.x -= CPU_Hi.x;
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CPU_Lo.valid = CPU_Hi.valid = CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid;
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CPU_Lo.halfFlags[0] = CPU_Hi.halfFlags[0] = (CPU_reg[rs(instr)].halfFlags[0] & CPU_reg[rt(instr)].halfFlags[0]);
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CPU_Lo.value = loVal;
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CPU_Hi.value = hiVal;
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@ -503,7 +505,7 @@ void PGXP_CPU_DIVU(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
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Validate(&CPU_reg[rt(instr)], rtVal);
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//// iCB: Only require one valid input
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if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
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if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
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{
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MakeValid(&CPU_reg[rs(instr)], rsVal);
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MakeValid(&CPU_reg[rt(instr)], rtVal);
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@ -516,7 +518,7 @@ void PGXP_CPU_DIVU(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
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CPU_Hi.x = fmod(fabs(vs), fabs(vt));
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CPU_Lo.x -= CPU_Hi.x;
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CPU_Lo.valid = CPU_Hi.valid = CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid;
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CPU_Lo.halfFlags[0] = CPU_Hi.halfFlags[0] = (CPU_reg[rs(instr)].halfFlags[0] & CPU_reg[rt(instr)].halfFlags[0]);
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CPU_Lo.value = loVal;
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CPU_Hi.value = hiVal;
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@ -760,7 +762,7 @@ void PGXP_CPU_SWR(u32 instr, u32 rtVal, u32 addr)
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void PGXP_CPU_SH(u32 instr, u16 rtVal, u32 addr)
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{
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// validate and copy half value
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MaskValidate(&CPU_reg[rt(instr)], rtVal, 0xFFFF);
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MaskValidate(&CPU_reg[rt(instr)], rtVal, 0xFFFF, VALID_0);
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WriteMem16(&CPU_reg[rt(instr)], addr);
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}
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@ -299,20 +299,20 @@ void PrintOperands(char* szBuffer, u32 instr, u32 flags, const char* szDelim, ps
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if (pReg)
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{
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sprintf(szTempBuffer, "%s %s [%x(%d, %d) %x(%.2f, %.2f, %.2f)%x : %x] ", szPre, szOpdName,
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sprintf(szTempBuffer, "%s %s [%x(%d, %d) %x(%.2f, %.2f, %.2f)%x : %x:%x:%x:%x] ", szPre, szOpdName,
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psx_reg.d, psx_reg.sw.l, psx_reg.sw.h,
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pReg->value, pReg->x, pReg->y, pReg->z, pReg->count, pReg->valid);
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pReg->value, pReg->x, pReg->y, pReg->z, pReg->count, pReg->compFlags[0], pReg->compFlags[1], pReg->compFlags[2], pReg->compFlags[3]);
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strcat(szBuffer, szTempBuffer);
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}
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else if(flag == fOp_Ad)
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{
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pReg = GetPtr(psx_reg.d);
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if(pReg)
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sprintf(szTempBuffer, "%s %s [%x(%d, %d) (%x) %x(%.2f, %.2f, %.2f)%x : %x] ", szPre, szOpdName,
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sprintf(szTempBuffer, "%s %s [%x(%d, %d) (%x) %x(%.2f, %.2f, %.2f)%x : %x:%x:%x:%x] ", szPre, szOpdName,
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psx_reg.d, psx_reg.sw.l, psx_reg.sw.h, PGXP_ConvertAddress(psx_reg.d),
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pReg->value, pReg->x, pReg->y, pReg->z, pReg->count, pReg->valid);
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pReg->value, pReg->x, pReg->y, pReg->z, pReg->count, pReg->compFlags[0], pReg->compFlags[1], pReg->compFlags[2], pReg->compFlags[3]);
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else
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sprintf(szTempBuffer, "%s %s [%x(%d, %d) INVALID_ADDRESS!] ", szPre, szOpdName,
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sprintf(szTempBuffer, "%s %s [%x(%d, %d) (%x) INVALID_ADDRESS!] ", szPre, szOpdName,
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psx_reg.d, psx_reg.sw.l, psx_reg.sw.h, PGXP_ConvertAddress(psx_reg.d));
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strcat(szBuffer, szTempBuffer);
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}
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@ -83,7 +83,7 @@ void PGXP_pushSXYZ2f(float _x, float _y, float _z, unsigned int _v)
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SXY2.y = _y;
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SXY2.z = Config.PGXP_Texture ? _z : 1.f;
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SXY2.value = _v;
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SXY2.valid = 1;
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SXY2.flags = VALID_ALL;
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SXY2.count = uCount++;
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// cache value in GPU plugin
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@ -94,7 +94,7 @@ void PGXP_pushSXYZ2f(float _x, float _y, float _z, unsigned int _v)
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GPU_pgxpCacheVertex(0, 0, NULL);
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#ifdef GTE_LOG
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GTE_LOG("PGXP_PUSH (%f, %f) %u %u|", SXY2.x, SXY2.y, SXY2.valid, SXY2.count);
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GTE_LOG("PGXP_PUSH (%f, %f) %u %u|", SXY2.x, SXY2.y, SXY2.flags, SXY2.count);
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#endif
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}
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@ -179,7 +179,7 @@ void PGXP_RTPS(u32 _n, u32 _v)
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int PGXP_NLCIP_valid()
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{
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if (SXY0.valid && SXY1.valid && SXY2.valid && Config.PGXP_GTE && (Config.PGXP_Mode > 0))
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if (((SXY0.flags & SXY1.flags & SXY2.flags & VALID_01) == VALID_01) && Config.PGXP_GTE && (Config.PGXP_Mode > 0))
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return 1;
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return 0;
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}
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@ -141,6 +141,7 @@ void ValidateAndCopyMem(PGXP_value* dest, u32 addr, u32 value)
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void ValidateAndCopyMem16(PGXP_value* dest, u32 addr, u32 value)
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{
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u32 validMask = 0;
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psx_value val, mask;
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PGXP_value* pMem = GetPtr(addr);
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if (pMem != NULL)
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@ -151,15 +152,17 @@ void ValidateAndCopyMem16(PGXP_value* dest, u32 addr, u32 value)
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{
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val.w.h = value;
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mask.w.h = 0xFFFF;
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validMask = VALID_1;
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}
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else
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{
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val.w.l = value;
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mask.w.l = 0xFFFF;
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validMask = VALID_0;
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}
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// validate and copy whole value
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MaskValidate(pMem, val.d, mask.d);
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||||
MaskValidate(pMem, val.d, mask.d, validMask);
|
||||
*dest = *pMem;
|
||||
|
||||
// if high word then shift
|
||||
|
@ -167,12 +170,14 @@ void ValidateAndCopyMem16(PGXP_value* dest, u32 addr, u32 value)
|
|||
{
|
||||
dest->x = dest->y;
|
||||
dest->lFlags = dest->hFlags;
|
||||
dest->compFlags[0] = dest->compFlags[1];
|
||||
}
|
||||
|
||||
// truncate value
|
||||
dest->y = 0.f;
|
||||
dest->hFlags = 0;
|
||||
dest->value = value;
|
||||
dest->compFlags[1] = VALID; // iCB: High word is valid, just 0
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -200,16 +205,18 @@ void WriteMem16(PGXP_value* src, u32 addr)
|
|||
{
|
||||
dest->y = src->x;
|
||||
dest->hFlags = src->lFlags;
|
||||
dest->compFlags[1] = src->compFlags[0];
|
||||
pVal->w.h = (u16)src->value;
|
||||
}
|
||||
else
|
||||
{
|
||||
dest->x = src->x;
|
||||
dest->lFlags = src->lFlags;
|
||||
dest->compFlags[0] = src->compFlags[0];
|
||||
pVal->w.l = (u16)src->value;
|
||||
}
|
||||
|
||||
dest->valid = dest->valid && src->valid;
|
||||
//dest->valid = dest->valid && src->valid;
|
||||
dest->gFlags |= src->gFlags; // inherit flags from both values (?)
|
||||
}
|
||||
}
|
||||
|
|
|
@ -5,12 +5,12 @@ void MakeValid(PGXP_value *pV, u32 psxV)
|
|||
{
|
||||
psx_value psx;
|
||||
psx.d = psxV;
|
||||
if (!pV->valid)
|
||||
if (VALID_01 != (pV->flags & VALID_01))
|
||||
{
|
||||
pV->x = psx.sw.l;
|
||||
pV->y = psx.sw.h;
|
||||
pV->z = 1.f;
|
||||
pV->valid = 1;
|
||||
pV->flags |= VALID_ALL;
|
||||
pV->value = psx.d;
|
||||
}
|
||||
}
|
||||
|
@ -18,11 +18,11 @@ void MakeValid(PGXP_value *pV, u32 psxV)
|
|||
void Validate(PGXP_value *pV, u32 psxV)
|
||||
{
|
||||
// assume pV is not NULL
|
||||
pV->valid = (pV->valid) && (pV->value == psxV);
|
||||
pV->flags &= pV->value == psxV ? ALL : INV_VALID_ALL;
|
||||
}
|
||||
|
||||
void MaskValidate(PGXP_value *pV, u32 psxV, u32 mask)
|
||||
void MaskValidate(PGXP_value *pV, u32 psxV, u32 mask, u32 validMask)
|
||||
{
|
||||
// assume pV is not NULL
|
||||
pV->valid = (pV->valid) && ((pV->value & mask) == (psxV & mask));
|
||||
pV->flags &= ((pV->value & mask) == (psxV & mask)) ? ALL : (ALL ^ (validMask));
|
||||
}
|
|
@ -51,7 +51,12 @@ typedef struct PGXP_value_Tag
|
|||
float x;
|
||||
float y;
|
||||
float z;
|
||||
unsigned int valid;
|
||||
union
|
||||
{
|
||||
unsigned int flags;
|
||||
unsigned char compFlags[4];
|
||||
unsigned short halfFlags[2];
|
||||
};
|
||||
unsigned int count;
|
||||
unsigned int value;
|
||||
|
||||
|
@ -76,12 +81,26 @@ typedef enum
|
|||
VALID_HALF = (1 << 0)
|
||||
} PGXP_half_flags;
|
||||
|
||||
//typedef enum
|
||||
//{
|
||||
#define NONE 0
|
||||
#define ALL 0xFFFFFFFF
|
||||
#define VALID 1
|
||||
#define VALID_0 (VALID << 0)
|
||||
#define VALID_1 (VALID << 8)
|
||||
#define VALID_2 (VALID << 16)
|
||||
#define VALID_3 (VALID << 24)
|
||||
#define VALID_01 (VALID_0 | VALID_1)
|
||||
#define VALID_ALL (VALID_0 | VALID_1 | VALID_2 | VALID_3)
|
||||
#define INV_VALID_ALL (ALL ^ VALID_ALL)
|
||||
//} PGXP_value_flags;
|
||||
|
||||
static const PGXP_value PGXP_value_invalid_address = { 0.f, 0.f, 0.f, 0, 0, 0, INVALID_ADDRESS, 0, 0 };
|
||||
static const PGXP_value PGXP_value_zero = { 0.f, 0.f, 0.f, 0, 0, 1, 0, 0, 0 };
|
||||
static const PGXP_value PGXP_value_zero = { 0.f, 0.f, 0.f, 0, 0, VALID_ALL, 0, 0, 0 };
|
||||
|
||||
void MakeValid(PGXP_value *pV, u32 psxV);
|
||||
void Validate(PGXP_value *pV, u32 psxV);
|
||||
void MaskValidate(PGXP_value *pV, u32 psxV, u32 mask);
|
||||
void MaskValidate(PGXP_value *pV, u32 psxV, u32 mask, u32 validMask);
|
||||
|
||||
|
||||
typedef union
|
||||
|
|
|
@ -36,12 +36,29 @@ typedef struct
|
|||
float x;
|
||||
float y;
|
||||
float z;
|
||||
unsigned int valid;
|
||||
union
|
||||
{
|
||||
unsigned int flags;
|
||||
unsigned char compFlags[4];
|
||||
};
|
||||
unsigned int count;
|
||||
unsigned int value;
|
||||
unsigned int flags;
|
||||
unsigned int mFlags;
|
||||
} PGXP_vertex;
|
||||
|
||||
#define NONE 0
|
||||
#define ALL 0xFFFFFFFF
|
||||
#define VALID 1
|
||||
#define VALID_0 (VALID << 0)
|
||||
#define VALID_1 (VALID << 8)
|
||||
#define VALID_2 (VALID << 16)
|
||||
#define VALID_3 (VALID << 24)
|
||||
#define VALID_01 (VALID_0 | VALID_1)
|
||||
#define VALID_012 (VALID_0 | VALID_1 | VALID_2)
|
||||
#define VALID_ALL (VALID_0 | VALID_1 | VALID_2 | VALID_3)
|
||||
#define INV_VALID_ALL (ALL ^ VALID_ALL)
|
||||
|
||||
|
||||
unsigned int PGXP_tDebug = 0;
|
||||
/////////////////////////////////
|
||||
//// Blade_Arma's Vertex Cache (CatBlade?)
|
||||
|
@ -113,13 +130,14 @@ void CALLBACK GPUpgxpCacheVertex(short sx, short sy, const unsigned char* _pVert
|
|||
(fabsf(pOldVertex->y - pNewVertex->y) > 0.1f) ||
|
||||
(fabsf(pOldVertex->z - pNewVertex->z) > 0.1f))
|
||||
{
|
||||
pOldVertex->valid = 5;
|
||||
pOldVertex->mFlags = 5;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// Write vertex into cache
|
||||
*pOldVertex = *pNewVertex;
|
||||
pOldVertex->mFlags = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -269,7 +287,7 @@ int PGXP_GetVertices(unsigned int* addr, void* pOutput, int xOffs, int yOffs)
|
|||
// Find any invalid vertices
|
||||
for (unsigned i = 0; i < count; ++i)
|
||||
{
|
||||
if (!primStart[stride * i].valid)
|
||||
if (!((primStart[stride * i].flags & VALID_012) == VALID_012))
|
||||
invalidVert++;
|
||||
}
|
||||
}
|
||||
|
@ -278,7 +296,7 @@ int PGXP_GetVertices(unsigned int* addr, void* pOutput, int xOffs, int yOffs)
|
|||
|
||||
for (unsigned i = 0; i < count; ++i)
|
||||
{
|
||||
if (primStart && primStart[stride * i].valid && (primStart[stride * i].value == *(unsigned int*)(&pPrimData[stride * i * 2])))
|
||||
if (primStart && ((primStart[stride * i].flags & VALID_01) == VALID_01) && (primStart[stride * i].value == *(unsigned int*)(&pPrimData[stride * i * 2])))
|
||||
{
|
||||
pVertex[i].x = (primStart[stride * i].x + xOffs);
|
||||
pVertex[i].y = (primStart[stride * i].y + yOffs);
|
||||
|
@ -286,6 +304,9 @@ int PGXP_GetVertices(unsigned int* addr, void* pOutput, int xOffs, int yOffs)
|
|||
pVertex[i].w = primStart[stride * i].z;
|
||||
pVertex[i].PGXP_flag = 1;
|
||||
|
||||
if ((primStart[stride * i].flags & VALID_2) != VALID_2)
|
||||
pVertex[i].PGXP_flag = 6;
|
||||
|
||||
// Log incorrect vertices
|
||||
//if (PGXP_tDebug &&
|
||||
// (fabs((float)pPrimData[stride * i * 2] - pVertex[i].x) > debug_tolerance) ||
|
||||
|
@ -295,7 +316,7 @@ int PGXP_GetVertices(unsigned int* addr, void* pOutput, int xOffs, int yOffs)
|
|||
else
|
||||
{
|
||||
// Default to low precision vertex data
|
||||
if (primStart && primStart[stride * i].valid && primStart[stride * i].value != *(unsigned int*)(&pPrimData[stride * i * 2]))
|
||||
if (primStart && ((primStart[stride * i].flags & VALID_01) == VALID_01) && primStart[stride * i].value != *(unsigned int*)(&pPrimData[stride * i * 2]))
|
||||
pVertex[i].PGXP_flag = 6;
|
||||
else
|
||||
pVertex[i].PGXP_flag = 2;
|
||||
|
@ -306,7 +327,7 @@ int PGXP_GetVertices(unsigned int* addr, void* pOutput, int xOffs, int yOffs)
|
|||
{
|
||||
if (IsSessionID(pCacheVert->count))
|
||||
{
|
||||
if (pCacheVert->valid == 1)
|
||||
if (pCacheVert->mFlags == 1)
|
||||
{
|
||||
pVertex[i].x = (pCacheVert->x + xOffs);
|
||||
pVertex[i].y = (pCacheVert->y + yOffs);
|
||||
|
@ -316,7 +337,7 @@ int PGXP_GetVertices(unsigned int* addr, void* pOutput, int xOffs, int yOffs)
|
|||
// reduce number of invalid vertices
|
||||
invalidVert--;
|
||||
}
|
||||
else if(pCacheVert->valid > 1)
|
||||
else if(pCacheVert->mFlags > 1)
|
||||
pVertex[i].PGXP_flag = 4;
|
||||
}
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue