xavi/android_kernel_m2note/arch/arm, branch ng-7.1.2

crypto: arm - replace memset by memzero_explicit

2019-07-08T11:36:44+00:00

Memset on a local variable may be removed when it is called just before the variable goes out of scope. Using memzero_explicit defeats this optimization. A simplified version of the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // @@ identifier x; type T; @@ { ... when any T x[...]; ... when any when exists - memset + memzero_explicit (x, -0, ...) ... when != x when strict } // This change was suggested by Daniel Borkmann Signed-off-by: Julia Lawall Acked-by: Ard Biesheuvel Signed-off-by: Herbert Xu Change-Id: I89b5957f922b7e5568a405c212eb186449f1deab (cherry picked from commit 025f4cbff16e284192b04bfa1f7b19551c1f5af3)

crypto: arm/sha256 - Use memzero_explicit to fill memory with 0

2019-07-08T11:36:43+00:00

memzero_explicit should be used instead in order to prevent the compiler from optimising away zeroing. Change-Id: I248925e4c3e934a98f1341b6649ca7cb200a7781 (cherry picked from commit af92d4cf4b0a9ffc39fbd242c2659267ea62fb97)

Fix "BACKPORT: ARM: wire up getrandom syscall"

2019-07-07T20:32:50+00:00

* Syscalls need to be greater than __NR_last_syscall+1 in order to account for the padding in the syscall table Change-Id: Ide15e25e8a2287fff29c75d898c935318b660ea2

BACKPORT: ARM: wire up getrandom syscall Clean cherry pick of eb6452537b280652eee66801ec97cc369e27e5d8.

2019-07-07T20:32:50+00:00

Add the new getrandom syscall for ARM. Signed-off-by: Russell King Bug: http://b/29621447 Change-Id: I6d50b57f3a61fbf9102c69103b9a5b7ebf239860 (cherry picked from commit eb6452537b280652eee66801ec97cc369e27e5d8)

ARM: 7933/1: rename ioremap_cached to ioremap_cache

2019-05-03T16:34:20+00:00

ioremap_cache is more aligned with other architectures. There are only 2 users of this in the kernel: pxa2xx-flash and Xen. This fixes Xen build failures on arm64: drivers/tty/hvc/hvc_xen.c:233:2: error: implicit declaration of function 'ioremap_cached' [-Werror=implicit-function-declaration] drivers/xen/grant-table.c:1174:3: error: implicit declaration of function 'ioremap_cached' [-Werror=implicit-function-declaration] drivers/xen/xenbus/xenbus_probe.c:778:4: error: implicit declaration of function 'ioremap_cached' [-Werror=implicit-function-declaration] Signed-off-by: Rob Herring Signed-off-by: Stefano Stabellini Signed-off-by: Russell King Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git Git-commit: 0a5ccc86507f45b80831dac1049197c4d45be955 [joonwoop@codeaurora.org: fixed trivial merge conflict.] Signed-off-by: Joonwoo Park Change-Id: I867b893aa63bc8647ed0d7cbf66b7fbb464ef8f0

ARM: spectre-v1: fix syscall entry

2019-05-03T16:16:05+00:00

Prevent speculation at the syscall table decoding by clamping the index used to zero on invalid system call numbers, and using the csdb speculative barrier. Change-Id: I59151ce75a3887d88eed852187f05013e665a7cb Signed-off-by: Russell King Acked-by: Mark Rutland Boot-tested-by: Tony Lindgren Reviewed-by: Tony Lindgren

ARM: spectre-v1: add array_index_mask_nospec() implementation

2019-05-03T16:15:52+00:00

Add an implementation of the array_index_mask_nospec() function for mitigating Spectre variant 1 throughout the kernel. Change-Id: I66d16e24b4725df0bf70f53c91a34be9f26fba98 Signed-off-by: Russell King Acked-by: Mark Rutland Boot-tested-by: Tony Lindgren Reviewed-by: Tony Lindgren

ARM: spectre-v1: add speculation barrier (csdb) macros

2019-05-03T16:15:37+00:00

Add assembly and C macros for the new CSDB instruction. Change-Id: Iff3490a0ebc290edf22128eba9e367dc5134fb3e Signed-off-by: Russell King Acked-by: Mark Rutland Boot-tested-by: Tony Lindgren Reviewed-by: Tony Lindgren

ARM: spectre-v2: harden branch predictor on context switches

2019-05-03T16:15:23+00:00

Harden the branch predictor against Spectre v2 attacks on context switches for ARMv7 and later CPUs. We do this by: Cortex A9, A12, A17, A73, A75: invalidating the BTB. Cortex A15, Brahma B15: invalidating the instruction cache. Cortex A57 and Cortex A72 are not addressed in this patch. Cortex R7 and Cortex R8 are also not addressed as we do not enforce memory protection on these cores. Change-Id: Ic2fb57dd40b6f7fc22a62f267ab24441ab09cc4b Signed-off-by: Russell King Boot-tested-by: Tony Lindgren Reviewed-by: Tony Lindgren Acked-by: Marc Zyngier

ARM: spectre: add Kconfig symbol for CPUs vulnerable to Spectre

2019-05-03T16:14:49+00:00

Add a Kconfig symbol for CPUs which are vulnerable to the Spectre attacks. Change-Id: I63aeb80cb82f9de4ddbb3bf83fefd5b0ce4237ba Signed-off-by: Russell King Reviewed-by: Florian Fainelli Boot-tested-by: Tony Lindgren Reviewed-by: Tony Lindgren Acked-by: Marc Zyngier