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<title>xavi/android_kernel_m2note/arch/arm64/kernel/process.c, branch o-8.1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<id>https://gitea.privatedns.org/xavi/android_kernel_m2note/atom?h=o-8.1</id>
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<updated>2017-12-22T15:24:42+00:00</updated>
<entry>
<title>Revert "arch/arm64: skip randomization within stack"</title>
<updated>2017-12-22T15:24:42+00:00</updated>
<author>
<name>Mister Oyster</name>
<email>oysterized@gmail.com</email>
</author>
<published>2017-12-21T20:12:20+00:00</published>
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<id>urn:sha1:a16d2b6a00a23a75a41e189a0da4fb56f62e6833</id>
<content type='text'>
This reverts commit 76848d1b0190a973e54cde8b7dab8af87b34f6f5.
</content>
</entry>
<entry>
<title>arch/arm64: skip randomization within stack</title>
<updated>2017-12-18T16:53:44+00:00</updated>
<author>
<name>Yi-wei Zhao</name>
<email>gbjc64@motorola.com</email>
</author>
<published>2016-09-25T23:35:14+00:00</published>
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<id>urn:sha1:6edbf6b6c9d74ab2169a5cad5d998ff479312451</id>
<content type='text'>
It's a WA to make 32-bit dhrystone generate consistent
scores during "sustained peformance mode" cts test.

Change-Id: Ib146224ff0701899640cbaba649227aba85534a0
Signed-off-by: Yi-wei Zhao &lt;gbjc64@motorola.com&gt;
Reviewed-on: https://gerrit.mot.com/902751
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver &lt;sltawvr@motorola.com&gt;
Tested-by: Jira Key &lt;jirakey@motorola.com&gt;
Reviewed-by: Igor Kovalenko &lt;igork@motorola.com&gt;
Submit-Approved: Jira Key &lt;jirakey@motorola.com&gt;
</content>
</entry>
<entry>
<title>arm64: Add CONFIG_CC_STACKPROTECTOR</title>
<updated>2017-04-11T08:57:00+00:00</updated>
<author>
<name>Laura Abbott</name>
<email>lauraa@codeaurora.org</email>
</author>
<published>2014-06-25T22:55:03+00:00</published>
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<id>urn:sha1:eeae7bbb8cbdcc000bb01d02ffa69952a4be8a73</id>
<content type='text'>
arm64 currently lacks support for -fstack-protector. Add
similar functionality to arm to detect stack corruption.

CRs-Fixed: 673518
Change-Id: Id48cdfbd426ca3d685da9926664208f4ad0d99ac
Signed-off-by: Laura Abbott &lt;lauraa@codeaurora.org&gt;
Signed-off-by: David Brown &lt;davidb@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>arm64: kernel thread don't need to save fpsimd context.</title>
<updated>2016-09-10T10:06:58+00:00</updated>
<author>
<name>Janet Liu</name>
<email>janet.liu@spreadtrum.com</email>
</author>
<published>2015-06-11T04:04:32+00:00</published>
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<id>urn:sha1:0698ae6597067c2ea04564cb61eeb5c3ccd95438</id>
<content type='text'>
kernel thread's default fpsimd state is zero. When fork a thread, if parent is kernel thread,
 and save hardware context to parent's fpsimd state, but this hardware context is user
process's context, because kernel thread don't use fpsimd, it will not introduce issue,
it add a little cost.

Change-Id: I292c0b328983b1ecaf642503183473c12bb1207b
Signed-off-by: Janet Liu &lt;janet.liu@spreadtrum.com&gt;
Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Git-commit: 6eb6c80187c55b7f95683bc6502dccac54b95b92
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Se Wang (Patrick) Oh &lt;sewango@codeaurora.org&gt;
Signed-off-by: franciscofranco &lt;franciscofranco.1990@gmail.com&gt;
</content>
</entry>
<entry>
<title>first commit</title>
<updated>2016-08-15T02:19:42+00:00</updated>
<author>
<name>Meizu OpenSource</name>
<email>patchwork@meizu.com</email>
</author>
<published>2016-08-15T02:19:42+00:00</published>
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<id>urn:sha1:d2e1446d81725c351dc73a03b397ce043fb18452</id>
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