xavi/android_kernel_m2note/arch/arm64/crypto, branch ng-7.1.2

Revert "GCC: Fix up for gcc 5+"

2018-11-29T23:02:49+00:00

This reverts commit ff505baaf412985af758d5820cd620ed9f1a7e05.

GCC: Fix up for gcc 5+

2018-11-29T11:38:19+00:00

Signed-off-by: mydongistiny Signed-off-by: Mister Oyster

crypto: remove duplicate impl.

2017-12-27T19:17:30+00:00

Revert "crypto: arm64/sha2 - add generated .S files to .gitignore" This reverts commit 9345ccbf273209e3946c3981122d068221a135d2. Revert "crypto: arm64/sha2 - integrate OpenSSL implementations of SHA256/SHA512" This reverts commit 02ea19edc643061fab3b6ea8bd54b96110a9f43b.

backport: crypto: arm64/chacha20 - implement NEON version based on SSE3 code

2017-12-21T14:00:24+00:00

This is a straight port to arm64/NEON of the x86 SSE3 implementation of the ChaCha20 stream cipher. It uses the new skcipher walksize attribute to process the input in strides of 4x the block size. Signed-off-by: Ard Biesheuvel Signed-off-by: Herbert Xu backported to 3.10 the same way arm chacha20 SNEON3 imp. for 3.18 was done : https://android-review.googlesource.com/c/kernel/common/+/551349 Signed-off-by: Mister Oyster

arm64/crypto: issue aese/aesmc instructions in pairs

2017-12-21T13:36:52+00:00

This changes the AES core transform implementations to issue aese/aesmc (and aesd/aesimc) in pairs. This enables a micro-architectural optimization in recent Cortex-A5x cores that improves performance by 50-90%. Measured performance in cycles per byte (Cortex-A57): CBC enc CBC dec CTR before 3.64 1.34 1.32 after 1.95 0.85 0.93 Note that this results in a ~5% performance decrease for older cores. Signed-off-by: Ard Biesheuvel Signed-off-by: Will Deacon (cherry picked from commit 4a97abd44329bf7b9c57f020224da5f823c9c9ea) Change-Id: I9d6b28b9bd9263bb273607590704111529323ca9

arm64: crypto: increase AES interleave to 4x

2017-12-21T13:35:31+00:00

This patch increases the interleave factor for parallel AES modes to 4x. This improves performance on Cortex-A57 by ~35%. This is due to the 3-cycle latency of AES instructions on the A57's relatively deep pipeline (compared to Cortex-A53 where the AES instruction latency is only 2 cycles). At the same time, disable inline expansion of the core AES functions, as the performance benefit of this feature is negligible. Measured on AMD Seattle (using tcrypt.ko mode=500 sec=1): Baseline (2x interleave, inline expansion) ------------------------------------------ testing speed of async cbc(aes) (cbc-aes-ce) decryption test 4 (128 bit key, 8192 byte blocks): 95545 operations in 1 seconds test 14 (256 bit key, 8192 byte blocks): 68496 operations in 1 seconds This patch (4x interleave, no inline expansion) ----------------------------------------------- testing speed of async cbc(aes) (cbc-aes-ce) decryption test 4 (128 bit key, 8192 byte blocks): 124735 operations in 1 seconds test 14 (256 bit key, 8192 byte blocks): 92328 operations in 1 seconds Signed-off-by: Ard Biesheuvel Signed-off-by: Catalin Marinas (cherry picked from commit 0eee0fbd41c7b57d01136df2519c92ec1506e333) Change-Id: I0fb82b0cc7f685a13c3d15c919be435917e17429

arm64/crypto: use crypto instructions to generate AES key schedule

2017-12-21T13:32:31+00:00

This patch implements the AES key schedule generation using ARMv8 Crypto Instructions. It replaces the table based C implementation in aes_generic.ko, which means we can drop the dependency on that module. Tested-by: Steve Capper Acked-by: Steve Capper Signed-off-by: Ard Biesheuvel Signed-off-by: Will Deacon (cherry picked from commit 12ac3efe74f888a13cb4df88b38bb01e8034dea8) Change-Id: I48488f43e280c4de8256365eb0be40d7be26d418

crypto: arm64/aes-blk - honour iv_out requirement in CBC and CTR modes

2017-12-21T13:06:43+00:00

Update the ARMv8 Crypto Extensions and the plain NEON AES implementations in CBC and CTR modes to return the next IV back to the skcipher API client. This is necessary for chaining to work correctly. Note that for CTR, this is only done if the request is a round multiple of the block size, since otherwise, chaining is impossible anyway. Cc: # v3.16+ Signed-off-by: Ard Biesheuvel Signed-off-by: Herbert Xu

arm64: crypto: reduce priority of core AES cipher

2017-12-21T12:31:34+00:00

The asynchronous, merged implementations of AES in CBC, CTR and XTS modes are preferred when available (i.e., when instantiating ablkciphers explicitly). However, the synchronous core AES cipher combined with the generic CBC mode implementation will produce a 'cbc(aes)' blkcipher that is callable asynchronously as well. To prevent this implementation from being used when the accelerated asynchronous implemenation is also available, lower its priority to 250 (i.e., below the asynchronous module's priority of 300). Signed-off-by: Ard Biesheuvel Signed-off-by: Catalin Marinas Signed-off-by: franciscofranco

crypto: arm64/crc32 - bring in line with generic CRC32

2017-12-21T12:27:10+00:00

The arm64 CRC32 (not CRC32c) implementation was not quite doing the same thing as the generic one. Fix that. Signed-off-by: Ard Biesheuvel Acked-by: Steve Capper Signed-off-by: Herbert Xu