<feed xmlns='http://www.w3.org/2005/Atom'>
<title>xavi/android_kernel_m2note/Documentation/devicetree, branch ng-7.1.2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<id>https://gitea.privatedns.org/xavi/android_kernel_m2note/atom?h=ng-7.1.2</id>
<link rel='self' href='https://gitea.privatedns.org/xavi/android_kernel_m2note/atom?h=ng-7.1.2'/>
<link rel='alternate' type='text/html' href='https://gitea.privatedns.org/xavi/android_kernel_m2note/'/>
<updated>2017-06-17T13:50:14+00:00</updated>
<entry>
<title>ARM: dts: imx31: fix clock control module interrupts description</title>
<updated>2017-06-17T13:50:14+00:00</updated>
<author>
<name>Vladimir Zapolskiy</name>
<email>vz@mleia.com</email>
</author>
<published>2016-09-26T00:03:40+00:00</published>
<link rel='alternate' type='text/html' href='https://gitea.privatedns.org/xavi/android_kernel_m2note/commit/?id=94fcfc610f18a4a34fa9045f72794256eab4362e'/>
<id>urn:sha1:94fcfc610f18a4a34fa9045f72794256eab4362e</id>
<content type='text'>
commit 2e575cbc930901718cc18e084566ecbb9a4b5ebb upstream.

The type of AVIC interrupt controller found on i.MX31 is one-cell,
namely 31 for CCM DVFS and 53 for CCM, however for clock control
module its interrupts are specified as 3-cells, fix it.

Fixes: ef0e4a606fb6 ("ARM: mx31: Replace clk_register_clkdev with clock DT lookup")
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Vladimir Zapolskiy &lt;vz@mleia.com&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
Signed-off-by: Willy Tarreau &lt;w@1wt.eu&gt;
</content>
</entry>
<entry>
<title>pinctrl: mvebu: armada-xp: fix functions of MPP48</title>
<updated>2016-08-26T17:29:45+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2015-06-09T16:46:58+00:00</published>
<link rel='alternate' type='text/html' href='https://gitea.privatedns.org/xavi/android_kernel_m2note/commit/?id=e0c4b2d491d6376687c28eca46e13ed618d792ca'/>
<id>urn:sha1:e0c4b2d491d6376687c28eca46e13ed618d792ca</id>
<content type='text'>
commit ea78b9511a54d0de026e04b5da86b30515072f31 upstream.

There was a mistake in the definition of the functions for MPP48 on
Marvell Armada XP. The second function is dev(clkout), and not tclk.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Stefan Guendhoer &lt;stefan@guendhoer.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions</title>
<updated>2016-08-26T17:29:44+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2015-06-09T16:46:57+00:00</published>
<link rel='alternate' type='text/html' href='https://gitea.privatedns.org/xavi/android_kernel_m2note/commit/?id=7c50ce24aa22cfebc752c9c441bb200f87237003'/>
<id>urn:sha1:7c50ce24aa22cfebc752c9c441bb200f87237003</id>
<content type='text'>
commit 80b3d04feab5e69d51cb2375eb989a7165e43e3b upstream.

The latest version of the Armada XP datasheet no longer documents the
VDD cpu_pd functions, which might indicate they are not working and/or
not supported. This commit ensures the pinctrl driver matches the
datasheet.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Stefan Guendhoer &lt;stefan@guendhoer.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mvebu: armada-xp: remove non-existing NAND pins</title>
<updated>2016-08-26T17:29:43+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2015-06-09T16:46:56+00:00</published>
<link rel='alternate' type='text/html' href='https://gitea.privatedns.org/xavi/android_kernel_m2note/commit/?id=8639c4a848fb5d46cd11c1b29b4be6b532463f9e'/>
<id>urn:sha1:8639c4a848fb5d46cd11c1b29b4be6b532463f9e</id>
<content type='text'>
commit bc99357f3690c11817756adfee0ece811a3db2e7 upstream.

After updating to a more recent version of the Armada XP datasheet, we
realized that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Stefan Guendhoer &lt;stefan@guendhoer.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mvebu: armada-370: fix spi0 pin description</title>
<updated>2016-08-26T17:29:42+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2015-06-09T16:46:54+00:00</published>
<link rel='alternate' type='text/html' href='https://gitea.privatedns.org/xavi/android_kernel_m2note/commit/?id=40d5a8d0960df05f494077a017ffba78f7459766'/>
<id>urn:sha1:40d5a8d0960df05f494077a017ffba78f7459766</id>
<content type='text'>
commit 438881dfddb9107ef0eb30b49368e91e092f0b3e upstream.

Due to a mistake, the CS0 and CS1 SPI0 functions were incorrectly
named "spi0-1" instead of just "spi0". This commit fixes that.

This DT binding change does not affect any of the in-tree users.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Fixes: 5f597bb2be57 ("pinctrl: mvebu: add pinctrl driver for Armada 370")
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Stefan Guendhoer &lt;stefan@guendhoer.com&gt;
</content>
</entry>
<entry>
<title>spi: pl022: Specify 'num-cs' property as required in devicetree binding</title>
<updated>2016-08-26T17:29:40+00:00</updated>
<author>
<name>Ezequiel Garcia</name>
<email>ezequiel@vanguardiasur.com.ar</email>
</author>
<published>2015-05-11T15:20:18+00:00</published>
<link rel='alternate' type='text/html' href='https://gitea.privatedns.org/xavi/android_kernel_m2note/commit/?id=3b0cb9e763ff6551a1d24210b9e5606f72540a71'/>
<id>urn:sha1:3b0cb9e763ff6551a1d24210b9e5606f72540a71</id>
<content type='text'>
commit ea6055c46eda1e19e02209814955e13f334bbe1b upstream.

Since commit 39a6ac11df65 ("spi/pl022: Devicetree support w/o platform data")
the 'num-cs' parameter cannot be passed through platform data when probing
with devicetree. Instead, it's a required devicetree property.

Fix the binding documentation so the property is properly specified.

Fixes: 39a6ac11df65 ("spi/pl022: Devicetree support w/o platform data")
Signed-off-by: Ezequiel Garcia &lt;ezequiel@vanguardiasur.com.ar&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Stefan Guendhoer &lt;stefan@guendhoer.com&gt;
</content>
</entry>
<entry>
<title>3.10.78 -&gt; 3.10.79</title>
<updated>2016-08-26T14:16:17+00:00</updated>
<author>
<name>Jan Engelmohr</name>
<email>jan.engelmohr@mailbox.tu-dresden.de</email>
</author>
<published>2016-08-01T11:32:35+00:00</published>
<link rel='alternate' type='text/html' href='https://gitea.privatedns.org/xavi/android_kernel_m2note/commit/?id=6117aabd7c9a3441063503fe2603d0fced723e27'/>
<id>urn:sha1:6117aabd7c9a3441063503fe2603d0fced723e27</id>
<content type='text'>
</content>
</entry>
<entry>
<title>first commit</title>
<updated>2016-08-15T02:19:42+00:00</updated>
<author>
<name>Meizu OpenSource</name>
<email>patchwork@meizu.com</email>
</author>
<published>2016-08-15T02:19:42+00:00</published>
<link rel='alternate' type='text/html' href='https://gitea.privatedns.org/xavi/android_kernel_m2note/commit/?id=d2e1446d81725c351dc73a03b397ce043fb18452'/>
<id>urn:sha1:d2e1446d81725c351dc73a03b397ce043fb18452</id>
<content type='text'>
</content>
</entry>
</feed>
